1. Technical Field
Embodiments of the present disclosure relate generally to frequency dividers, and specifically to a programmable frequency divider providing output with reduced duty-cycle variations over a range of divide ratios.
2. Related Art
A frequency divider is an electronic circuit that receives a periodic input signal and generates a periodic output signal with a frequency that is less than or equal to the frequency of the input signal. The ratio of the frequency of the output signal to that of the input signal is referred to as the desired divide ratio, and can be an integer or a fraction. A fractional (desired) divide ratio may be achieved by using different integer divide ratios over multiple iterations such that the average value of the integer divide ratios equals the desired divide ratio (i.e., a fraction). The desired divide ratio may be programmable (i.e., selectable) by a user via corresponding input(s) to the frequency divider, and a frequency divider may be designed to support a range of integer divide ratios from a lowest limit to a highest limit. The desired divide ratio is hereafter referred to as ‘user input’, while the variable divide ratio used in each cycle/iteration is referred to simply as the ‘divide ratio’ for conciseness.
The duty cycle of a periodic signal is generally the ratio of the active duration (e.g., duration of logic high) to the period of the periodic signal. It may be desirable that the duty cycle of the output signal of a programmable frequency divider vary as little as possible despite changes in the divide ratio.
In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.